1. Field
Embodiments described herein relate to a sense amplifier circuit system allowing for flag read control during write, the sense amplifier circuit system being provided in a semiconductor memory device that includes a nonvolatile memory cell array.
2. Description of the Related Art
NAND flash memories, in which a plurality of electrically rewritable nonvolatile memory cells are connected in series to configure a NAND cell unit (NAND string), are in greater and greater demand due to increasingly large capacity.
In large capacity NAND flash memory of recent years, a flag data region is provided in addition to an ordinary data region, the flag data region employing a method such as one in which, for example, protect information is written to the flag data region and a specific block is set to write prohibit (refer, for example, to JP 2007-323321 A).
In an ordinary write command sequence for a NAND flash memory, a write command input, address input, write data input, and write execute command input are performed in that order, and then, subsequent to the write execute command input and prior to start of an internal write operation, a flag data read operation is performed. In order to realize the above-mentioned protect flag function with such a write command sequence, write data already loaded must be prevented from being destroyed during flag data read.
To render flag data readable while retaining the write data, the sense amplifier needs only be provided with a plurality of data latches, for example.
In the case of a multilevel data storage (MLC: Multi Level Cell) system, the need to retain first page write data and perform second page data write while referring to the first page write data leads to an ordinary sense amplifier being provided with a plurality of data latches (refer, for example, to JP 2009-070501 A). This kind of sense amplifier allows flag data to be read without destroying the write data.
However, in a binary data storage (SLC: Single Level Cell) system, simply put, a sense amplifier has only a single data latch (refer, for example, to JP 2005-116102 A). In the case of such a simple sense amplifier, unless some kind of measure is taken when applying the above-mentioned write command sequence, the write data gets destroyed.